This invention relates to a thin-film transistor circuit comprising a main thin-film transistor and an input gate protection device comprising first and second subsidiary thin-film transistors connected in series to the gate electrode of the main thin-film transistor for protecting the gate of the main thin-film transistor against the effect of excessively high voltages which may arise as a result of, for example, static charge.
Japanese patent application publication No. JP-A-59-16378 describes such a circuit. In the arrangements described in this Japanese application one or more subsidiary thin-film transistors are connected in series between the gate electrode of the main thin-film transistor and earth (ground).
In the example shown in FIG. 3 of JP-A-59-16378 the input gate protection device is formed by two subsidiary thin-film transistors with the first subsidiary thin-film transistor having its gate electrode connected to its drain electrode and to the gate electrode of the main thin-film transistor and the second thin-film transistor similarly having its gate electrode connected to its drain electrode which is also connected to the source electrode of the first subsidiary thin-film transistor.
In operation of this device when a positive gate voltage greater than the threshold voltage of the first subsidiary thin-film transistor is applied to the gate electrode of the main thin-film transistor the first subsidiary thin-film transistor will be rendered conducting and once the voltage at the gate electrode of the second subsidiary thin-film transistor reaches the threshold voltage of the second subsidiary thin-film transistor then this too will conduct, so connecting the gate electrode of the main thin-film transistor to earth (ground) and avoiding breakdown of the gate dielectric.
The voltage at which the input gate protection device will conduct to connect the gate electrode of the main thin-film transistor to earth (ground) is thus determined by the threshold voltages of the subsidiary thin-film transistors and also the number of series-connected subsidiary thin-film transistors used to form the input gate protection device.
FIG. 5 of JP-A-59-16378 illustrates an X-Y matrix drive liquid crystal display device in which a number of main thin-film transistors are provided to form the switching elements of the device. In this example an input gate protection device is provided for each switching element and is in the form of a single subsidiary thin-film transistor. In this case the input gate protection device is designed to protect the associated switching element against excessively high negative voltages on the bus line to which the gate electrode of the main thin-film transistor is connected and so the single subsidiary thin-film transistor has its gate and drain connected together to earth. Again the voltage at which the input gate protection device conducts to connect the gate electrode of the main thin-film transistor or switching element to earth is determined by the threshold voltage of the subsidiary thin-film transistor.
JP-A-59-16378 thus describes two different circuits one designed to protect against positive over-voltages and the other designed to protect against negative over-voltages. It is, however, stated in the description that in each case the opposite polarity of over-voltage can be protected against by p-channel rather than normal n-channel operation of the subsidiary thin-film transistors forming the input gate protection device. Again, however, the over-voltage at which the input gate protection device conducts is determined by the threshold voltage and number of series-connected subsidiary thin-film transistors.